What is a PCB Stackup?

Introduction to PCB Stackups

A printed circuit board (PCB) is made up of multiple layers of conductive and insulating materials laminated together. The sequence of materials that make up the PCB is referred to as the PCB stackup. The stackup defines the layer structure of the PCB and determines its electrical, mechanical, and thermal characteristics.

The PCB stackup consists of conductive layers like copper that form the traces or interconnects between components, and insulating dielectric layers like FR-4 that provide electrical isolation between the conductive layers. The number of layers, thickness of each layer, and order in which the layers are stacked determines the functionality of the PCB. A proper stackup design is crucial for routing high-speed signals through controlled impedance transmission lines and minimizing electromagnetic interference.

In this article, we will take a detailed look at PCB stackups, the key elements that comprise a stackup, considerations for designing stackups, and how stackups impact PCB performance and manufacturability.

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Elements of a PCB Stackup

The key elements that make up a PCB stackup include:

Conductive Layers

The conductive layers in a PCB stackup provide the interconnect or routing between electronic components and devices mounted on the board. The most common conductive material used is copper, either in the form of copper foil or electroplated/electroless plated copper.

Typical conductive layer thickness in a PCB stackup range from 0.5 oz (0.7 mils/18 μm) up to 6 oz (2.8 mils/70 μm) or more for heavy copper boards. 1 oz (1.4 mils/35 μm) copper is commonly used. The thicker the copper, the lower the resistive losses.

Dielectric Layers

The dielectric or insulating material separates the conductive layers and provides electrical isolation between them. Some common dielectric materials used in PCBs include:

FR-4 Glass Epoxy – Most common rigid PCB substrate
Polyimide – Used in flexible PCBs
PTFE (Teflon) – High frequency boards
Ceramic filled PTFE – Improved thermal conductivity
FR-5, FR-6 – High Tg glass epoxy grades

The thickness of the dielectric layers help determine the spacing between adjacent conductive layers and impacts the board’s electrical performance. Typical thickness range from 2 mils to 30 mils. The dielectric constant (Dk) and loss tangent are also key parameters that determine signal propagation and loss characteristics.

Prepreg Layers

The prepreg or pre-impregnated composite layers are B-stage cured dielectric materials that when laminated bond the conductive foil layers together. Prepregs are typically fiberglass reinforced epoxy resin sheets that are partially cured to a semi-solid state. During lamination under heat and pressure, the prepreg layers flow and fully cure to form a homogeneous board.

Core Layers

Core layers refer to thicker dielectric layers in a PCB stackup that provide mechanical support and rigidity to the board. They are often sandwiched between thin prepreg layers. Common thicknesses range from 30 mils to 60 mils. Cores may themselves be made up of thinner dielectric layers bonded together.

Solder Mask Layers

The solder mask or solder resist is a protective coating applied on the outer conductive layers of a PCB. It prevents solder bridging between pads during assembly and provides corrosion resistance. Solder mask is typically a polymer layer that is screen printed or photo-imaged, with openings left on pads.

Silkscreen Layers

The silkscreen layer carries printing or markings on the PCB for identification. This includes reference designators, logos, board outlines, polarity markings, etc. Epoxy or acrylic based inks are used for silkscreen printing.

Finish/Plating Layers

The outer conductive layers are plated with metallic finishes like HASL, immersion tin, immersion silver etc. This protects the copper from oxidation and provides solderability. Other platings like gold, nickel/gold are used for wire bonding or corrosion resistance.

Stackup Design Considerations

Several factors have to be taken into account when designing the layer stackup for a PCB. Some key considerations include:

Layer Count

The number of conductive and dielectric layers in a stackup depends on the board’s interconnect complexity and density. More layers allow complex routing but increase cost. High density designs may require 20 layers or more. Typical layer counts are 4, 6, 8 and 10 or more if needed.

Layer Sequence

The order in which conductive and dielectric layers are sequenced in a stackup can impact routing, power distribution, and signal integrity. Adjacent layers should be sequenced to optimize high-speed routing, power distribution, and decoupling capacitors placement.

Dielectric Thickness

Thinner dielectrics allow thinner boards and tighter layer spacing. This helps in routing dense designs but requires thinner copper and can increase layer count. Thicker dielectrics provide better signal integrity at higher voltages but increase board thickness.

Symmetry

Symmetrical stackups with dielectric layers of same thickness on either side of a signal layer provide the most uniform environment for controlled impedance transmission line routing. Non-symmetrical stackups make routing differential pairs challenging.

High-Speed Layers

Critical high-speed signals should be routed on layers adjacent to a continuous reference plane. This helps maintain controlled impedance and reduces EMI/crosstalk. Inner layers are preferred for high-speed routing as outer layers are more prone to EMI.

Power and Ground Planes

Complete uninterrupted planes should be used for power and ground to provide low impedance return paths. Multiple power and ground planes may be required for proper decoupling and reducing power loop inductance.

Component Placement

Component placement on the board surface should match routing layer breakout requirements. High pin count components should be placed to optimize escape routing to respective signal layers.

Impact of Stackups on PCB Performance

The stackup design directly impacts the electrical, thermal and mechanical performance of a PCB. Here are some key considerations:

Signal Integrity

A stackup designed for proper impedance control, symmetry and reference planes is crucial for signal integrity. Thin dielectrics, close reference planes and proper component placement optimize high-speed signal performance.

Power Integrity

Multiple uninterrupted power and ground planes with sufficient decoupling capacitors placed close to IC devices are needed for clean power distribution. Power planes should be sequenced in the stackup for optimum capacitance between adjacent power and ground layers.

EMI Control

A symmetrical stackup with continuous reference planes minimizes EMI issues by providing shielding and low impedance return paths. Additional shielding layers can be added if needed for sensitive circuits. Proper component placement and routing also reduce unwanted radiation.

Thermal Management

The thermal conductivity of dielectric materials affects heat dissipation from components. High power components need to be placed on layers with thermally conductive dielectrics adjacent to them. Thin layers also improve heat transfer between layers.

Mechanical Robustness

The structural integrity of a PCB depends on the number of layers, core thickness and materials used. More layers and thicker cores increase stiffness but also thickness and weight. The coefficient of thermal expansion (CTE) of the materials also impacts mechanical reliability.

Manufacturability

The stackup design impacts the manufacturability of the board. Thinner layers and higher layer counts increase complexity and cost. Panel utilization, aspect ratio and mechanical drillability are also considered.

High-Speed Stackup Examples

Here are some examples of PCB stackup configurations designed for routing high-speed differential signals:

4-Layer High-Speed Stackup

4-layer board with two signal layers
Signal layers adjacent to continuous reference planes
Prepreg dielectric between signal and plane layers
Thick core dielectric layer

This provides a simple symmetrical stackup with solid reference planes for impedance control and shielding on the two inner signal layers. Well suited for less complex designs.

6-Layer High-Speed Stackup

6-layer board with four signal layers
Two signal layers between power and ground planes
Additional signal layers on outer layers
Closely spaced reference planes for differential pairs

With four routing layers, this stackup can handle more complex designs. The layer sequence and spacing provides excellent SI performance for high-speed signals.

12-Layer High-Speed Stackup

12-layer board with 6 signal layers
Signal layers adjacent to reference planes
Multiple power and ground planes
Several thin dielectric layers

A 12-layer stackup allows very complex routing of high pin-count ICs. The multiple planes help distribute power while thin dielectrics provide tight spacing for impedance control.

Guidelines for Stackup Design

Here are some key guidelines to follow when designing the layer stackup for a PCB:

Place critical high-speed signals adjacent to continuous reference planes
Use symmetrical stackup configurations whenever possible
Have ground plane next to each signal layer for shielding
Include multiple power and ground planes for decoupling
Sequence power and ground planes for optimal capacitance
Minimize changes in dielectric thickness around critical traces
Ensure dielectric materials have stable and consistent properties
Keep individual layer thickness under 3 mils for better etching
Use thick cores (30+ mils) when overall thickness needed
Place thicker layers toward board center for rigidity
Adjust layer count based on design complexity
Plan layer transitions to optimize component placement
Verify stackup manufacturability with fabricator input
Model stackup in PCB layout tools and simulate prior to finalizing

Following these guidelines will result in a stackup optimized for the design requirements from an electrical, thermal, mechanical and manufacturability standpoint.

High-Density Interconnect (HDI) Stackups

HDI technology utilizes a specialized PCB stackup with very fine features to enable high interconnect density and miniaturization. Some key attributes include:

Large number of thin dielectric layers (5-20)
Typical dielectric thickness of 2 mils or less
L/S ratio > 8 mils with microvias
Laser drilled microvias as small as 0.005″ -Build-up dielectrics to increase layer count
Often incorporate blind/buried vias
Fine line tight tolerance etch

HDI allows routing trace pitches under 5 mils facilitating high I/O components. The multiple thinner layers reduce signal length and losses. Blind/buried vias optimize routing while reducing layer transitions. The finer geometries and tighter tolerances make HDI PCBs more challenging to manufacture.

Here is an example 12-layer HDI stackup:<img src=”https://i.ibb.co/3MGND5F/HDI-Stackup.png” alt=”HDI Stackup”>

HDI technology enables miniaturization for advanced portable electronics, medical devices, automotive electronics and other products requiring small form factors and high density integration. The specialized stackups do come at a higher cost which needs to be traded off based on design requirements.

Stackup Design Tools

To facilitate PCB stackup design, layout tools provide specific functionality for modeling and analyzing different stackup configurations. This includes:

Stackup Editors – Provide a graphical interface for defining layer materials, sequence, thickness and relative order. Can import stackup info from manufacturers.
Impedance Calculators – Used to calculate transmission line impedance based on stackup parameters like trace dimensions, dielectric thickness and properties. Help verify impedance control.
Layer Mappings – Map PCB layers to actual stackup layers accounting for all conductive and dielectric layers. Required for accurate modeling.
Cross-Section Views – Display 2D cross-section plots of the board along different cutlines to visualize stackup layer structure.
Differential Pair Routing – Planar views clearly identify differential pairs and provide tools for matched length tuning stubs and serpentine patterns.
Drill Drawings – Display all mechanical drill spans and hole sizes needed for the designed layer stackup.
Signal Integrity Simulations – Perform pre-layout signal integrity analysis of critical nets based on designed stackup to identify potential issues.
Stackup Reports – Generate detailed stackup documentation drawings and layer callout reports for fabrication.

Leveraging such PCB layout tools greatly simplifies the process of visualizing, optimizing and documenting complex multilayer stackup designs.

Stackup Design Process

The overall workflow for designing the PCB stackup involves:

Defining design constraints and requirements – This includes parameters like board thickness, layer count, dielectric materials, high-speed signals, critical components etc.
Selecting initial stackup configuration – Determine a starting stackup based on complexity, layer count, high-speed layers, and other requirements.
Modeling stackup in layout tool – Build the initial stackup in the PCB layout tool with all conductive and dielectric layers specified.
Verifying electrical performance – Use impedance calculators, SI simulations and signal integrity analysis to verify stackup design meets requirements.
Optimizing stackup – Iterate and refine the stackup to improve high-speed routing, power distribution, EMI control.
Checking manufacturability – Review stackup design with fabricator to ensure it is manufacturable.
Finalizing documentation – Generate stackup drawings, layer callouts, drill tables and fabrication notes.
Submitting for fabrication – Handoff final stackup data to PCB manufacturer for prototyping or production.

Careful planning and design of the PCB stackup lays the foundation for a successfully functioning board. Aspects like high-speed signal routing, power distribution, thermal management, and mechanical rigidity all depend directly on the stackup configuration. Optimizing the stackup is therefore one of the most vital steps in the PCB development process.

Conclusion

The printed circuit board stackup encompasses the materials, layer sequence and geometries that determine the structure of a PCB. A properly engineered stackup is crucial for electrical performance, thermal management and manufacturability. Key elements include conductive layers for interconnect routing, dielectric materials for isolation and structural stability, along with protective coatings and finishes.

Stackup design considerations include layer count, symmetry, dielectric properties, plane placement and component layout among others. HDI technology utilizes microvias and thin dielectrics to enable ultra-high density integration. Continued advancements in materials, fabrication processes, and design tools will enable stackups with finer features and improved performance to meet the needs of emerging electronic applications.

Frequently Asked Questions

What are some typical dielectric materials used in PCB stackups?

Some common dielectric materials used are:

FR-4 Glass Epoxy – Most widely used rigid PCB substrate
High Tg FR-4 – For higher temperature applications
Polyimide – Used in flexible PCBs
PTFE (Teflon) – For high frequency boards
Ceramic filled PTFE – Improves thermal conductivity
ROgers RO4003 – High frequency RF material
Isola, Taconic – Specialty microwave laminates

How many routing layers are needed for a complex PCB design?

For a complex PCB with high pin count components, typically 8-12 signal routing layers are needed to handle all the required interconnects. Critical high-speed signals are routed on the inner layers adjacent reference planes. The outer layers are used for component fanout and escape routing.

What is the difference between PTH and blind/buried vias used in PCBs?

PTH or plated-through holes are drilled holes that span through the entire PCB sandwich and connect between layers. Blind vias connect between layers but do not go through the whole board. Buried vias are contained within the middle of the board with no connection to the outer surfaces. Blind/buried vias allow higher connection density.

How are very small microvias in HDI PCBs fabricated?

Microvias with diameter below 8 mils can’t be mechanically drilled. They are typically laser drilled by ablating small holes through the dielectric layers. The holes are then plated to form the barrel interconnect. Laser drilling allows microvias down to 3-5 mils for HDI boards.

Why are multiple power and ground planes used in complex PCB stackups?

Using multiple power and ground planes provides several benefits:

Allows separation of different voltage levels
Lowers impedance for power distribution
Reduces ground noise and EMI
Provides distributed decoupling capacitance
Improves high frequency performance

The improved power integrity, signal integrity and EMI control makes the additional planes worth the increased cost.