Introduction to Multi Layer PCB Design

Multi layer printed circuit boards (PCBs) have become increasingly common in modern electronics due to their ability to accommodate complex circuitry in a compact form factor. By stacking multiple layers of conductive copper and insulating substrate material, designers can route a high density of interconnections between components while minimizing electromagnetic interference (EMI) and signal integrity issues.

Key advantages of multi layer PCB design include:

• Increased routing density and circuit complexity
• Improved signal integrity and reduced crosstalk
• Better power distribution and thermal management
• Smaller form factor and packaging options

However, designing multi layer PCBs presents additional challenges compared to simple 2-layer boards. Special considerations must be made for via placement, layer stack-up, controlled impedance routing, and power/ground plane design.

Understanding Ground Free Areas (GFA) in PCBs

One important concept in multi layer PCB design is the use of Ground Free Areas, or GFAs. A GFA is a region on a PCB layer where the reference plane (usually a ground plane) is intentionally removed. This is done to prevent return currents from flowing in certain areas, which can help to:

• Reduce EMI radiation from high-frequency signals
• Minimize crosstalk between adjacent traces
• Improve isolation between circuit blocks
• Allow for controlled impedance routing

GFAs are typically used in mixed-signal designs where analog and digital circuits coexist on the same board. By strategically placing GFAs, designers can keep sensitive analog signals away from noisy digital return currents.

Implementing GFAs in Altium Designer

Altium Designer is a powerful PCB design tool that includes features for defining and managing GFAs in multi layer boards. Here are the basic steps for implementing a GFA in Altium:

1. Create a new PCB project and define the layer stack-up, including signal layers, power planes, and ground planes.

2. Draw a polygon on the desired signal layer to represent the GFA region. This polygon should cover the area where you want to remove the reference plane.

3. Set the polygon properties to define it as a GFA:

4. Set the Layer to the reference plane layer (e.g. GND)
5. Set the Polygon Pour to “Negative”

6. Enable the “Remove Unused Pads” option

7. Run the “Polygon Pour All” command to remove the copper from the GFA region on the reference plane layer.

8. Route your signals through the GFA region as needed, making sure to follow controlled impedance and clearance rules.

Here’s an example PCB layer stack-up showing a GFA on the ground plane layer:

Layer	Material	Thickness
Top	Copper	1 oz
GND	Copper (GFA)	0.5 oz
Inner1	Copper	0.5 oz
PWR	Copper	0.5 oz
Inner2	Copper	0.5 oz
Bottom	Copper	1 oz

In this example, the GND layer has a negative polygon pour to create a GFA region, while the other layers are solid copper planes.

Design Considerations for GFAs

When incorporating GFAs into your multi layer PCB design, there are several important factors to consider:

GFA Size and Shape

The size and shape of your GFA will depend on the specific requirements of your circuit. In general, the GFA should be large enough to encompass any sensitive signals that need to be isolated, but not so large that it compromises the overall integrity of the reference plane.

Some guidelines for GFA sizing:
– Minimum GFA width: 10x the dielectric thickness between layers
– Maximum GFA area: 50% of the total reference plane area
– Avoid acute angles or narrow necks in GFA shapes

Signal Routing and Impedance Control

Routing signals through a GFA region requires careful attention to impedance control and trace geometry. Without a continuous reference plane underneath, the impedance of a trace can vary significantly, leading to signal reflections and distortion.

To maintain consistent impedance in a GFA:
– Use wider traces to compensate for the lack of a reference plane
– Minimize the distance between the signal trace and the nearest reference plane
– Avoid sharp bends or vias within the GFA region
– Use differential pair routing for high-speed signals

EMI and Crosstalk Reduction

One of the main purposes of a GFA is to reduce electromagnetic interference (EMI) and crosstalk between signals. However, removing the reference plane can also have the opposite effect if not done carefully.

To minimize EMI and crosstalk in a GFA:
– Keep high-frequency signals away from the edges of the GFA
– Provide a low-impedance return path for signals entering/exiting the GFA
– Use guard traces or copper pours to shield sensitive signals
– Avoid routing signals parallel to each other within the GFA

Power Distribution and Decoupling

GFAs can also impact the power distribution network (PDN) of your PCB, as they interrupt the continuous power and ground planes. This can lead to increased impedance and voltage drop across the board.

To maintain a robust PDN with GFAs:
– Use multiple vias to stitch power and ground planes together near the GFA
– Place decoupling capacitors close to ICs and connectors
– Monitor PDN impedance and voltage drop using simulation tools
– Consider using separate power and ground planes for analog and digital sections

Simulating and Verifying GFA Designs

Before sending your multi layer PCB design for fabrication, it’s important to simulate and verify the performance of your GFAs. Altium Designer includes several tools for analyzing signal integrity, power integrity, and EMI in the presence of GFAs:

• Signal Integrity (SI) Simulator: Allows you to simulate the behavior of signals passing through a GFA, including impedance discontinuities, reflections, and crosstalk.

• Power Integrity (PI) Simulator: Helps you analyze the impact of GFAs on your PDN, including voltage drop, impedance, and decoupling.

• Electromagnetic Compatibility (EMC) Simulator: Predicts the EMI radiation patterns and coupling effects of signals in a GFA.

By running these simulations and verifying that your design meets the necessary performance criteria, you can avoid costly redesigns and manufacturing issues down the line.

Best Practices for Multi Layer PCB Design with GFAs

To summarize, here are some best practices to follow when designing multi layer PCBs with ground free areas in Altium:

1. Define your layer stack-up carefully, considering signal integrity, power distribution, and manufacturability.

2. Use GFAs strategically to isolate sensitive signals and reduce EMI/crosstalk, but don’t overuse them.

3. Follow controlled impedance and routing guidelines for signals passing through GFAs.

4. Keep GFA sizes and shapes within recommended limits, and avoid acute angles or narrow necks.

5. Provide low-impedance Return Paths and stitching vias for signals entering/exiting GFAs.

6. Use simulation tools to verify signal integrity, power integrity, and EMC before fabrication.

7. Communicate your GFA requirements clearly to your PCB manufacturer and assembly house.

By following these guidelines and leveraging the powerful features of Altium Designer, you can create robust and reliable multi layer PCBs with effective ground free areas.

Frequently Asked Questions (FAQ)

1. What is the purpose of a ground free area (GFA) in a PCB?

A ground free area is a region on a PCB layer where the reference plane (usually a ground plane) is intentionally removed. This is done to prevent return currents from flowing in certain areas, which can help to reduce EMI radiation, minimize crosstalk, improve isolation, and allow for controlled impedance routing.

2. How do I create a GFA in Altium Designer?

To create a GFA in Altium Designer, draw a polygon on the desired signal layer to represent the GFA region. Then set the polygon properties to define it as a GFA by setting the Layer to the reference plane layer, the Polygon Pour to “Negative”, and enabling the “Remove Unused Pads” option. Finally, run the “Polygon Pour All” command to remove the copper from the GFA region.

3. What are some guidelines for sizing and shaping GFAs?

Some general guidelines for GFA sizing and shaping include:
– Minimum GFA width: 10x the dielectric thickness between layers
– Maximum GFA area: 50% of the total reference plane area
– Avoid acute angles or narrow necks in GFA shapes

4. How do I maintain consistent impedance when routing signals through a GFA?

To maintain consistent impedance in a GFA, use wider traces to compensate for the lack of a reference plane, minimize the distance between the signal trace and the nearest reference plane, avoid sharp bends or vias within the GFA region, and use differential pair routing for high-speed signals.

5. What simulation tools are available in Altium Designer for verifying GFA designs?

Altium Designer includes several tools for analyzing signal integrity, power integrity, and EMI in the presence of GFAs, such as the Signal Integrity (SI) Simulator, Power Integrity (PI) Simulator, and Electromagnetic Compatibility (EMC) Simulator. By running these simulations and verifying that your design meets the necessary performance criteria, you can avoid costly redesigns and manufacturing issues.