What is Input Impedance?

Input impedance refers to the equivalent impedance “seen” by a signal source when connected to the input of a circuit. It is a measure of how much the circuit resists or impedes the flow of current from the signal source.

For an ideal operational amplifier (op amp), the input impedance should be infinite. This means the op amp will draw no current from the signal source and will not load down or affect the signal in any way. In reality, op amps have very high but finite input impedance, typically ranging from 1 MΩ to over 1012 Ω (1 TΩ).

Why is High Input Impedance Important?

A high input impedance is desirable for several reasons:

1. It minimizes loading of the signal source. Drawing too much current from the source can distort the signal.

2. It enables the op amp to sense the signal voltage accurately without influencing it. The sensed voltage should depend only on the source, not the sensing circuit.

3. It allows the op amp to be used in applications requiring minimal interaction with the signal source, such as in voltage followers, active filters, and instrumentation amplifiers.

4. It provides a stable reference point for the input signal that is relatively immune to noise and interference.

Factors Affecting Op Amp Input Impedance

Several factors influence an op amp’s input impedance:

1. Type of Input Stage

The input stage of an op amp largely determines its input impedance. There are three common types of input stages:

Input Stage	Description	Input Impedance
Bipolar Junction Transistor (BJT)	Uses BJTs in a differential pair configuration. Simple but has lowest input impedance.	1 MΩ to 10 MΩ
Junction Field-Effect Transistor (JFET)	Uses JFETs as the input devices. Has higher input impedance than BJTs.	1012 Ω
Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET)	Uses MOSFETs as the input devices. Has the highest input impedance.	1012 Ω to 1015 Ω

Most modern op amps use JFET or MOSFET input stages due to their superior input impedance. BJT input stages are still used in some high-speed and low-noise applications.

2. Input Bias Current

Input bias current is the small DC current that flows into or out of the op amp’s input terminals when no signal is applied. It is caused by imperfections in the transistors and is a function of temperature.

A higher input bias current means more current is drawn from the signal source, effectively lowering the input impedance. Typical values range from a few pA to a few nA for JFET and MOSFET input stages, and up to a few µA for BJT input stages.

3. Input Offset Current

Input offset current is the difference between the input bias currents of the two input terminals. It causes a small DC Voltage to appear at the output even when the input is zero.

While input offset current does not directly affect input impedance, it is often specified alongside input bias current and provides an indication of the matching between the input transistors.

4. Input Capacitance

The op amp’s input terminals have a small amount of parasitic capacitance, typically a few pF, due to the transistor junctions and wiring. This capacitance appears in parallel with the input resistance, creating a frequency-dependent input impedance.

At low frequencies, the input capacitance has little effect and the input impedance is dominated by the input resistance. As frequency increases, the impedance of the input capacitance decreases, causing the overall input impedance to decrease as well.

Measuring Op Amp Input Impedance

Input impedance can be measured directly or inferred from other parameters. Here are a few common methods:

1. Direct Measurement

The most straightforward way to measure input impedance is to apply a known AC voltage to the input and measure the resulting current. The impedance is then calculated using Ohm’s Law:

Z = V / I

Where:
– Z is the impedance in ohms (Ω)
– V is the voltage in volts (V)
– I is the current in amps (A)

This method requires a high-precision ammeter capable of measuring very small currents, typically in the pA to nA range. The measurement should be made at various frequencies to characterize the input impedance over the desired frequency range.

2. Inference from Input Bias Current

Input impedance can be estimated from the input bias current specification using the following formula:

Zin = Vmax / Ib

Where:
– Zin is the input impedance in ohms (Ω)
– Vmax is the maximum allowable input voltage in volts (V), typically the supply voltage
– Ib is the input bias current in amps (A)

For example, an op amp with a ±15 V supply and a 1 nA input bias current would have an input impedance of:

Zin = 15 V / 1 nA = 15 GΩ

This method provides a conservative estimate of the input impedance, as the actual impedance is usually higher than the calculated value.

3. Inference from Datasheet Graphs

Many op amp datasheets include graphs of input impedance vs. frequency. These graphs can be used to estimate the input impedance at a specific frequency or over a range of frequencies.

For example, the following graph shows the input impedance of a typical JFET-input op amp:

        10^15 |                 ___________________
              |                /
              |               /
Input         |              /
Impedance     |             /
(Ohms)        |            /
        10^12 |           /
              |          /
              |         /
              |        /
        10^9  |       /
              |      /
              |     /
              |    /
        10^6  |   /
              |  /
              | /
              |/
        10^3  +------+------+------+------+------+------ 
              10     100    1K     10K    100K   1M
                        Frequency (Hz)

From this graph, we can see that the op amp has an input impedance of about 1012 Ω at low frequencies, decreasing to about 109 Ω at 1 MHz.

Calculating Op Amp Input Impedance

The input impedance of an op amp can be modeled as a resistor (Rin) in parallel with a capacitor (Cin). The impedance of this parallel combination is given by:

Zin = Rin || (1 / jωCin)

Where:
– Zin is the input impedance in ohms (Ω)
– Rin is the input resistance in ohms (Ω)
– Cin is the input capacitance in farads (F)
– ω is the angular frequency in radians per second (rad/s), equal to 2πf
– f is the frequency in hertz (Hz)
– j is the imaginary unit, equal to √(-1)

At low frequencies (ω → 0), the impedance of the capacitor becomes very large and the input impedance is dominated by the input resistance:

Zin ≈ Rin

At high frequencies (ω → ∞), the impedance of the capacitor becomes very small and the input impedance is dominated by the input capacitance:

Zin ≈ 1 / jωCin

The transition between these two regions occurs at the cutoff frequency (fc), where the impedance of the input resistance equals the impedance of the input capacitance:

fc = 1 / (2πRinCin)

For example, consider an op amp with an input resistance of 1012 Ω and an input capacitance of 5 pF. The cutoff frequency is:

fc = 1 / (2π × 1012 Ω × 5 pF) ≈ 32 kHz

Below 32 kHz, the input impedance is approximately equal to the input resistance (1012 Ω). Above 32 kHz, the input impedance decreases with increasing frequency due to the input capacitance.

Op Amp Input Impedance Examples

Here are a few examples of op amps with different input stages and their typical input impedance specifications:

Op Amp	Input Stage	Input Resistance	Input Capacitance	Input Bias Current
LM741	BJT	2 MΩ	1.4 pF	500 nA
TL081	JFET	1012 Ω	3 pF	50 pA
LMC6001	CMOS	1015 Ω	20 pF	0.01 pA

As can be seen, JFET and CMOS input stages offer much higher input impedance than BJT input stages, both in terms of input resistance and input bias current. However, they also tend to have higher input capacitance, which can limit their high-frequency performance.

Conclusion

Input impedance is a critical parameter of op amps that determines how well they can sense and amplify signals without loading down the signal source. It is influenced by the type of input stage, input bias current, input offset current, and input capacitance.

High input impedance is desirable for most applications, and is achieved using JFET or MOSFET input stages. Input impedance can be measured directly or inferred from other parameters such as input bias current or datasheet graphs.

Understanding input impedance is essential for designing and troubleshooting circuits that use op amps, as it affects signal integrity, noise performance, and overall system accuracy.

FAQ

What is the ideal input impedance of an op amp?

The ideal input impedance of an op amp is infinite, meaning it would draw no current from the signal source and have no effect on the signal. In practice, op amps have very high but finite input impedance, typically ranging from 1 MΩ to over 1 TΩ.

What is the difference between input resistance and input impedance?

Input resistance is the real part of the input impedance and represents the resistance to DC current flow. Input impedance is the complex combination of input resistance and input capacitance, and represents the total opposition to current flow, both DC and AC.

How does input impedance vary with frequency?

Input impedance decreases with increasing frequency due to the presence of input capacitance. At low frequencies, the input impedance is dominated by the input resistance. At high frequencies, the input impedance is dominated by the input capacitance.

What is the effect of input bias current on input impedance?

Input bias current is a measure of the current drawn by the op amp’s input stage. A higher input bias current means more current is drawn from the signal source, effectively lowering the input impedance.

How can I increase the input impedance of an op amp circuit?

There are a few ways to increase the input impedance of an op amp circuit:

1. Use an op amp with a JFET or MOSFET input stage, which have higher input impedance than BJT input stages.

2. Use a unity-gain buffer (voltage follower) at the input to isolate the signal source from the loading effects of the op amp.

3. Use a bootstrapping technique to increase the effective input impedance by feeding back a portion of the output signal to the input.

4. Use guarding techniques to minimize leakage currents and Parasitic Capacitances at the input.