What is Design Rule Check (DRC)?

Design Rule Check, commonly known as DRC, is a critical step in the electronic design automation (EDA) process. It is an automated verification tool that checks the layout of an integrated circuit (IC) design against a set of predefined design rules. These rules are established by the semiconductor foundry or the fabrication facility to ensure that the design can be manufactured reliably and with high yield.

DRC is performed after the physical layout of the circuit is complete and before sending the design for fabrication. The primary purpose of DRC is to identify and flag any potential design rule violations that could lead to manufacturing issues or device malfunction.

Types of Design Rules

Design rules can be categorized into several types, depending on the specific requirements of the fabrication process and the technology node. Some common types of design rules include:

1. Minimum width and spacing rules: These rules specify the minimum allowed width of metal traces and the minimum spacing between adjacent traces to avoid short circuits and ensure proper isolation.

2. Minimum area rules: These rules define the minimum allowed area for specific features, such as contact holes or metal pads, to ensure adequate manufacturability and reliability.

3. Antenna rules: These rules are designed to prevent damage to the gate oxide of transistors during the plasma etching process by limiting the maximum allowed ratio of metal area to gate area.

4. Density rules: These rules specify the minimum and maximum allowed density of metal or polysilicon features in a given area to ensure uniform chemical-mechanical planarization (CMP) and avoid manufacturing defects.

5. Electromigration rules: These rules are intended to prevent the gradual displacement of metal atoms due to high current density, which can lead to open circuits or short circuits over time.

Importance of DRC in IC Design Flow

DRC is a crucial step in the IC design flow for several reasons:

1. Manufacturing yield: By identifying and correcting design rule violations before fabrication, DRC helps to maximize the manufacturing yield and minimize the number of defective chips.

2. Reliability: Adhering to design rules ensures that the manufactured devices will function reliably over their intended lifetime, reducing the risk of premature failure or malfunction.

3. Cost reduction: Catching design rule violations early in the design process helps to avoid costly redesigns and mask revisions, ultimately reducing the overall cost of the project.

4. Time-to-market: DRC enables designers to quickly iterate on their layouts and make necessary corrections, accelerating the design cycle and reducing time-to-market.

DRC Tools and Methodologies

There are several commercial and open-source DRC tools available in the market, each with its own set of features and capabilities. Some popular DRC tools include:

1. Calibre DRC (Mentor Graphics)
2. IC Validator (Synopsys)
3. Pegasus (Cadence)
4. Magic VLSI (Open-source)

These tools typically require two main inputs:

1. Layout database: This is the physical layout of the IC design in a standard format, such as GDSII or OASIS.

2. Design rule deck: This is a set of design rules specific to the fabrication process and technology node, usually provided by the foundry in a proprietary format.

The DRC tool compares the layout database against the design rule deck and generates a report listing any violations found. The report usually includes the location, type, and severity of each violation, along with a visual representation of the affected